c o p y r igh t @ w i n s em i microelectronics c o . , lt d . , a l l ri g h t r e s er v ed . w w w w cd4c60 cd4c60 cd4c60 cd4c60 rev.a oct .2010 silicon silicon silicon silicon controlled controlled controlled controlled rectifiers rectifiers rectifiers rectifiers features ? repetitive peak off-state voltage : 600v ? r.m.s on-state current ( i t(rms) = 4 a ) ? low on-state voltage (1.6v(typ.) @ i tm ) ? isolation voltage(v iso =1500v ac) general description standard gate triggering scr is fully isolated package suitable for the application where requiring high bidirectional blocking voltage capability and also suitable for over voltage protection ,motor control circuit in power tool, inrush current limit circuit and heating control system. absolute maximum ratings ( t j = 25 c unless otherwise specified ) symbol parameter condition ratings units v drm repetitive peak off-state voltage 600 v i t(av) average on-state current ( 180 conduction angle ) t i = 60 c 1.35 a tamb=25 c 0.9 i t(rms) r.m.s on-state current ( 180 conduction angle ) t i = 60 c 4 a tamb=25 c 1.35 i tsm surge on-state current 1/2 cycle, 60hz, sine wavenon-repetitive 33 a i 2 t i 2 t for fusing t = 10 ms 4.5 a 2 s di/dt critical rate of rise of on-state current f=60hz,tj=125 c 50 a/ ? p gm forward peak gate power dissipation 0.5 w p g(av) forward average gate power dissipation tj=125 c 0.2 w i fgm forward peak gate current 1. 2 a v iso isolation breakdown voltage(r.m..s) a,c.1minute 1500 v t j operating junction temperature -40~125 c c t stg storage temperature -40~150 c c thermal characteristics symbol parameter value units r j c thermal resistance junction to case(dc) 15 /w r j a thermal resistance junction to ambient (dc) 100 /w
steady, steady, steady, steady, keep keep keep keep you you you you advance advance advance advance w w w w cd4c60 cd4c60 cd4c60 cd4c60 2 / 5 electrical characteristics (t c =25 unless otherwise noted) symbol parameter test conditions value units min typ max i drm repetitive peak off-state current v ak =v drm r gk =1k - - 10 a - - 1 ma v tm peak on-state voltage (1) itm=8a, tp=380 ? - 1.6 1.8 v i gt gate trigger current (2) v d =12v,r l =140 - - 15 m a v gt gate trigger voltage (2) - - 1.5 v v gd non-trigger gate voltage (1) v d =12v,r l =3.3k , r gk =1 k 0.1 v dv/dt critical rate of rise off-state voltage v d =67%v drm , r gk =1 k 200 - - v/ ? i h holding current i t =50ma, r gk =1 k - - 20 ma i l latching current i t =1ma, r gk =1 k 6 - - ma r d dynamic resistance t j =125 c - - 100 m note: note: note: note: 1. pulse width = 1.0 ms , duty cycle 1% 2. r gk current not included in measurement
steady, steady, steady, steady, keep keep keep keep you you you you advance advance advance advance w w w w cd4c60 cd4c60 cd4c60 cd4c60 3 / 5 fig fig fig fig . . . . 1 1 1 1 a verage and d.c.on-state current versus ambient temperature (device mounted on fr4 with recommended pad layout) fig. fig. fig. fig. 2 2 2 2 maximum average power dissipation versus average on-state current fig. fig. fig. fig. 3 3 3 3 relative variation of gate trigger current and holding current versus junction temperature fig. fig. fig. fig. 4 4 4 4 surge peak on-state current versus number of cycles. fig.5 fig.5 fig.5 fig.5 relative variation of dv/dt immunity versus gate-cathode resistance(typical values) fig.6 relative variation of dv/dt immunity versus gate-cathode resistance(typical values)
steady, steady, steady, steady, keep keep keep keep you you you you advance advance advance advance w w w w cd4c60 cd4c60 cd4c60 cd4c60 4 / 5 fig.7 fig.7 fig.7 fig.7 on-state characteristics (maximum values) fig.8 fig.8 fig.8 fig.8 thermal resistance junction to ambient versus copper surface under tab (epoxy printed circuit board fr4,copper thickness:35mm)
steady, steady, steady, steady, keep keep keep keep you you you you advance advance advance advance w w w w cd4c60 cd4c60 cd4c60 cd4c60 5 / 5 to to to to -252 -252 -252 -252 package package package package dimension dimension dimension dimension unit: unit: unit: unit: mm mm mm mm
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